Tan Nguyen
Biographical Sketch
Tan Nguyen is a research scientist at Lawrence Berkeley National Laboratory. Nguyen's research focuses on performance analysis and code optimizations for various processor architectures, including multi- and many-core CPUs, GPUs, FPGAs and specialized (e.g. AI) accelerators. He is also interested in compiler analysis and code generation, programming models and runtime systems for large-scale applications.
Nguyen received his Ph.D. degree in Computer Science from University of California, San Diego in 2014. Nguyen is an alumnus of the Vietnam Education Foundation.
Current Projects
- PDES: develop compiler and runtime support for parallel discrete event simulations
- PARADISE++: Large Scale Optimistic Synchronization based simulation of Post Moore Systems (ARO Project)
- ExaEPI/RADIUM: develop agent-based models for epidemiological simulation
- Project 38: design specialized hardware for DFT workload
- Collaborative research activities: scalable AI algorithms, Graph Neural Networks, disaggregated systems
Past Projects
- NERSC10: Explore alternative processor architectures for the next generation of supercomputer at NERSC
- ECP-Hardware Evaluation: Use Performance Analysis Tools to predict application performance on future DOE's systems
- AMReX: Optimize Massively Parallel, Block-structured Adaptive Mesh Refinement (AMR) Applications
- ICAR: downscaling method for meteorological simulations
- Veracity: develop compiler techniques that facilitate hardware coDesign
- ExaSAT: An Exascale Static Analysis Tool for Hardware/Software Design Space Evaluation
Journal Articles
Tan Nguyen, Colin MacLean, Marco Siracusa, Douglas Doerfler, Nicholas J. Wright, Samuel Williams, "FPGA‐based HPC accelerators: An evaluation on performance and energy efficiency", CCPE, August 22, 2021, doi: 10.1002/cpe.6570
Weiqun Zhang, Ann Almgren, Vince Beckner, John Bell, Johannes Blashke, Cy Chan, Marcus Day, Brian Friesen, Kevin Gott, Daniel Graves, Max P. Katz, Andrew Myers, Tan Nguyen, Andrew Nonaka, Michele Rosso, Samuel Williams, Michael Zingale, "AMReX: a framework for block-structured adaptive mesh refinement", Journal of Open Source Software, May 2019, doi: 10.21105/joss.01370
Tan Nguyen, Pietro Cicotti, Eric Bylaska, Dan Quinlan, and Scott Baden, "Automatic Translation of MPI Source into a Latency-tolerant, Data-driven Form", Journal of Parallel and Distributed Computing, February 21, 2017,
Weiqun Zhang, Ann Almgren, Marcus Day, Tan Nguyen, John Shalf, Didem Unat, "BoxLib with Tiling: An AMR Software Framework", SIAM Journal on Scientific Computing, 2016,
Tan Nguyen, Daniel Hefenbrock, Jason Oberg, Ryan Kastner and Scott Baden, "A software-based dynamic-warp scheduling approach for load-balancing the Viola-Jones face detection algorithm on GPUs", Journal of Parallel and Distributed Computing, January 31, 2013,
Conference Papers
John Bachan, Jianlan Ye, Xuan Jiang, Tan Nguyen, Mahesh Natarajan, Maximilian Bremer, Cy Chan, "Devastator: A Scalable Parallel Discrete Event Simulation Framework for Modern C++", In 38th ACM SIGSIM Conference on Principles of Advanced Discrete Simulation (SIGSIM PADS ’24), June 24, 2024,
Maximilian Bremer, Nirmalendu Patra, Tan Nguyen, Dilip Vasudevan, Cy Chan, "Benefits of Optimistic Parallel Discrete Event Simulation for Network-on-Chip Simulation", 2023 IEEE/ACM 27th International Symposium on Distributed Simulation and Real Time Applications (DS-RT), Singapore, October 2, 2023, doi: 10.1109/DS-RT58998.2023.00013
Khaled Z. Ibrahim, Tan Nguyen, Hai Ah Nam, Wahid Bhimji, Steven Farrell, Leonid Oliker, Michael Rowan, Nicholas J. Wright, Samuel Williams, "Architectural Requirements for Deep Learning Workloads in HPC Environments", (BEST PAPER), Performance Modeling, Benchmarking, and Simulation (PMBS), November 2021,
- Download File: pmbs21-DL-final.pdf (pdf: 632 KB)
Tan Nguyen, Erich Strohmaier, John Shalf, "Facilitating CoDesign with Automatic Code Similarity Learning", 7th Workshop on the LLVM Compiler Infrastructure in HPC (LLVM-HPC), November 14, 2021,
Douglas Doerfler, Farzad Fatollahi-Fard, Colin MacLean, Tan Nguyen, Samuel Williams, Nicholas J. Wright, Marco Siracusa, "Experiences Porting the SU3_Bench Microbenchmark to the Intel Arria 10 and Xilinx Alveo U280 FPGAs", International Workshop on OpenCL (iWOCL), April 2021, doi: 10.1145/3456669.3456671
Tan Nguyen, Samuel Williams, Marco Siracusa, Colin MacLean, Douglas Doerfler, Nicholas J. Wright, "The Performance and Energy Efficiency Potential of FPGAs in Scientific Computing", (BEST PAPER) Performance Modeling, Benchmarking, and Simulation of High Performance Computer Systems (PMBS), November 2020,
- Download File: PMBS20-FPGA-final.pdf (pdf: 2.9 MB)