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Computer Architecture Group

Mota Mapper

Multi-Objective Topology Aware Mapper

Mota is a library that provides several heuristics for the purpose of AMR task placement.  It is multi-objective in the sense that it simultaneously balances the computational load on each rank as well as the communication traffic between the boxes.  We are investigating a variety of approaches to do the task placement and utilizing modeling and simulation tools to evaluate these approaches.  The heuristics used for mapping include algorithms such as greedy list assignment and space-filling curves, as well as algorithms from graph analysis such as adjacency matrix bandwidth reduction, recursive bisection, and greedy graph placement.

Mota 1

(Image credits: Mathworks and R. Dickau)


 Mota is being used in conjunction with ProgrAMR and SST/Macro for the purpose of simulating AMR performance on future network interconnection topologies and is being integrated into the BoxLib AMR framework for box placement during dynamic regridding.  We utilize switch-link topology models for current and future supercomputer network interconnects to do task placement and make a detailed evaluation of the network utilization and performance.

Mota Graphs

Our results so far have shown the potential to significantly decrease the average number of message-hops through the network using advanced task placement heuristics that take network topology into account.

Edison Interconnect2 (Images: NERSC)





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