ExaSAT

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One of the emerging challenges to design HPC systems is to understand and project the requirements of exascale applications. In order to determine the performance consequences of different hardware designs, analytic models are essential because they can provide fast feedback to the co-design centers and chip designers without costly simulations.  However, current attempts to analytically model program performance typically rely on the user manually specifying a performance model.

The ExaSAT framework automates the extraction of parameterized performance models directly from source code using compiler analysis. The figure above shows the workflow of our framework. The parameterized analytic model enables quantitative evaluation of a broad range of hardware design trade-offs and software optimizations on a variety of different performance metrics, with a primary focus on data movement as a metric.

Our work has demonstrated the ExaSAT framework's ability to perform deep code analysis of a proxy application from the DOE Combustion Co-design Center to illustrate its value to the exascale co-design process. ExaSAT analysis provides insights in the hardware and software tradeoffs and lays the groundwork for exploring a more targeted set of design points using cycle-accurate architectural simulators.

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