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Superconducting Race Logic Accelerators

ARO Project

SCRL

The aim of this project is to make computation in superconducting circuits, circuits that operate around 4K temperatures and have close to zero resistance, as efficient as possible. Many approaches today try to re-use computing architectures (the design of logic gates and circuits) inspired by traditional technologies into superconducting logic. This is not efficient since superconducting circuits are different: accessing memory is very expensive but the circuit itself can operate at hundreds of GHz frequencies. Using this observation, we make use of race logic computation, which is a computing paradigm developed by our collaborators in UC Santa Barbara, that encodes information in the temporal domain. For instance, instead of encoding the value "5" with three bits as done today, we use only one bit where a pulse comes in at time unit "5".

To make this observation useful, we need to design large-scale computing accelerators around them, make them easy to use in a system setting, and decide which science applications would most benefit from such an accelerator in order to design accelerators that can one day be adopted in future supercomputing systems. In this work, we replace the traditional logic gates such as "AND" and "OR" with race logic ones that can be used to implement logic functions.

From this work we expect multiple orders of magnitude improvements in performance per unit power for a class of applications compatible with this computing scheme.

Project Participants