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DFT Beyond Moore’s Law: Extreme Hardware Specialization for the Future of HPC



The project goal is to demonstrate the performance potential of purpose-built architectures as potential future for HPC applications in absence of Moore’s Law. Our approach is to reformulate the LS3DF algorithm to make it amenable to specialized hardware and to develop a custom accelerator for Density Functional Theory. The initial design/prototype will target an FPGA, and results will also be projected to an ASIC. Later, we intend to generalize our results to to broader implications for DOE HPC workload. The impact of this project is to determine the feasibility of this approach for future DOE HPC. It can help NERSC to establish a new public-private business model with HPC vendors, and can potentially change how NERSC operates in “Post Moore” era.

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