Future Technologies Group
The Future Technologies Group (FTG) performs research in high-performance computing (HPC) technology for petascale and exascale systems, including research into computer architecture and application codesign, performance optimization, performance analysis, benchmarking, and performance engineering of scientific applications, parallel language design, low-level paralle communication systems, compilers, operating systems, and runtime systems.
The overarching goal of the group is to enable computational science through the design and development of hardware and software systems that allow application scientists to more effectively use high-end machines. FTG is a research group committed to the design and development of hardware and software systems that allow scientists to more effectively use extreme scale computers. It works to create and improve upon computer architectures (both software and hardware), languages, operating systems, and conduct performance evaluation for all aspects of computers and applications. The group seeks to push computer science to new limits to meet the demands of computational science; thereby allowing scientists to analyze and solve the most challenging problems.
Members of FTG work closely with application scientists throughout the DOE Office of Science community (e.g., climate modeling, astrophysics, fusion simulation, life sciences, and nanoscience), with faculty and students from the Electrical Engineering and Computer Sciences Department at U.C. Berkeley, and with the NERSC production computing facility. Group members have access to leading-edge production computing platforms as well as hardware prototypes of experimental systems. FTG members have a strong history of publications in top journals and conferences and have developed software systems that are broadly used outside the group.
Specific areas of research in which FTG is currently engaged include the following:
- Architecture and application codesign and simulation for exascale. Group members are evaluating hardware software co-design trade-offs by using compiler analysis and simulation methods. These findings help designing future generation chips and programming models to take advantage of exascale systems.
- Performance optimization and automatic performance tuning (auto-tuning). Group members are actively developing auto-tuning frameworks designed to bridge the performance gap between out-of-the box MPI implementations of key computational kernels and the performance that may be attained via extensive, architecture- and domain-specific optimization using a hybrid (threads+MPI) programming model in a productive, user-friendly fashion.
- Performance analysis, modeling and benchmarking. The FTG performance activity works closely with hardware designers from industry and academia, providing workload information about network patterns and memory system usage to quantitatively drive architecture efforts. Specific projects include petascale system and application characterization, performance modeling and tools, and the usage of these facilities for system assessment and selection.
- Novel programming models and supporting software. The FTG programming model activity works with the U.C. Berkeley Unified Parallel C (UPC) project team on basic research and development of fast communication libraries, compiler optimizations for parallel languages, and future languages and language extensions for petascale systems.
- Operating Systems for HPC. The FTG operating system (OS) activity develops production quality tools such as checkpoint-restart software, and performs research into future OS designs that balance key functional features with the need for lightweight control over hardware resources such as multi-core processors.
- Modeling of Complex Systems. Members of FTG are developing an agent-based model of Complex, Interconnected Networked Systems. The goal is to enhance the understanding of the evolution and dynamics of complex networks such as the Internet.